Epson LX-86TM Especificações descarregar pdf (Página 65)

REV.-A

2.4.7.2 Printhead Drive Pulse Width Control Circuit

In order to keep the value of the

printhead drive pulse width constant, the

CpU

monitors the +24 VDC

line, the

printhead common voltage, and uses the voltage

level

to adjust the width of the FIRE signal.

The

printhead drive pulse width is controlled to be within the area shown by the oblique lines in Figure

2-Bn

425

!W.

400

-.—

405

350

;

wYz////z

345

325

300

21.6

26.4

Printhead Driving Voltage

[V]

Fig. 2-30. Printhead Drive Pulse Width Range

+24V

R36

2.2K

l/2W

VAref

)

+5 +24

AVCC

?!-

-.-,

.-.

Fig. 2-31. +24

VDC

Monitor Circuit

The CPU monitors the +24 V line at

AN5 of the 8-bit analog to digital converter, computes the result,

and controls the drive pulse width of the signal (FIRE) output from the event timer. 4.7 V is applied to

reference voltage input

VAref by ZD3, and the voltage obtained by dividing +24 V by R37 and R35

(approximately 4.08 V at

+24.OV)

is input to AN5.

2-33

1 2 ... 60 61 62 63 64 65 66 67 68 69 70 ... 141 142

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