Epson SED 1520 Series Especificações descarregar pdf (Página 47)

S1D15300 Series

Rev.1.4 EPSON 5–35

(4) Display control timing

Notes: 1. The otput timing is valid in master mode.

2. Every timing is specified on the basis of 20% and 80% of V

(5) Reset timing

Note: The reset timing is specified on the basis of 20% and 80% of V

DD.

Output timing V

= 5.0 V ±10%, Ta = –40 to +85°C

Output timing V

= 0 V, V

= 2.7 V to 4.5 V, Ta = –40 to +85°C

Parameter Signal Symbol Condition Min. Typ. Max. Unit

FR delay time FR t

DFR

CL = 50 pF – 10 40 ns

DYO HIGH delay time DYO t

DOH

– 40 100 ns

DYO LOW delay time t

DOL

– 40 100 ns

Parameter Signal Symbol Condition Min. Typ. Max. Unit

FR delay time FR t

DFR

CL = 50 pF – 15 80 ns

DYO HIGH delay time DYO t

DOH

– 70 200 ns

DYO LOW delay time t

DOL

– 70 200 ns

Parameter Signal Symbol Condition Min. Typ. Max. Unit

Reset time

0.5 – – µs

Reset LOW pulse width RES t

0.5 – – µs

= 5.0 V ±10%, Ta = –40 to +85°C

= 2.7 V to 4.5 V, Ta = –40 to +85°C

Parameter Signal Symbol Condition Min. Typ. Max. Unit

Reset time

1.0 – – µs

Reset LOW pulse width RES

1.0 – – µs

(OUT)

DFR

DOH

DOL

DYO

t RW

t R

End of resetDuring reset

RES

Internal circuit

status

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